XC4VFX60-10FF672I

Product Summary

The XC4VFX60-10FF672I is the newest FPGA from Xilinx. The innovative Advanced Silicon Modular Block or ASMBL column-based architecture is unique in the programmable logic industry. Choice and feature combinations are offered for all complex applications. A wide array of hard-IP core blocks complete the system solution. These cores of XC4VFX60-10FF672I include the PowerPC processors (with a new APU interface), Tri-Mode Ethernet MACs, 622 Mb/s to 11.1 Gb/s serial transceivers, voltage/temperature system monitor blocks, dedicated DSP slices, high-speed clock management circuitry, and source-synchronous interface blocks. The XC4VFX60-10FF672I building blocks are an enhancement of those found in the popular Virtex-based product families: Virtex, Virtex-E, Virtex-II, Virtex-II Pro, and Virtex-II Pro X, allowing upward compatibility of existing designs. The XC4VFX60-10FF672I is produced on a state-of-the-art 90-nm copper process, using 300 mm (12 inch) wafer technology. Combining a wide variety of flexible features, the Virtex-4 family enhances programmable logic design capabilities and is a powerful alternative to ASIC technology.

Parametrics

XC4VFX60-10FF672I absolute maximum ratings: (1)VCCINT, Internal supply voltage relative to GND: –0.5 to 1.32 V; (2)VCCAUX, Auxiliary supply voltage relative to GND: –0.5 to 3.0 V; (3)VCCO, Output drivers supply voltage relative to GND: –0.5 to 3.75 V; (4)VBATT, Key memory battery backup supply: –0.5 to 4.05 V; (5)VREF, Input reference voltage: –0.3 to 3.75 V; (6)VIN: I/O input voltage relative to GND(all user and dedicated I/Os):–0.75 to 4.05 V; I/O input voltage relative to GND (restricted to maximum of 100 user I/Os)(3,4): –0.95 to 4.4v(Commercial Temperature), –0.85 to 4.3v(Industrial Temperature); 2.5V or below I/O input voltage relative to GND(user and dedicated I/Os):–0.75 to VCCO +0.5 V; (7)IIN, Current applied to an I/O pin, powered or unpowered: ±100 mA; Total current applied to all I/O pins, powered or unpowered: ±200 mA; (8)VTS:Voltage applied to 3-state 3.3V output(all user and dedicated I/Os):–0.75 to 4.05 V;Voltage applied to 3-state 3.3V output(restricted to maximum of 100 user I/Os):–0.95 to 4.4v(Commercial Temperature); –0.85 to 4.3v(Industrial Temperature); 2.5V or below I/O input voltage relative to GND(user and dedicated I/Os):–0.75 to VCCO +0.5 V; (9)AVCCAUXRX, Receive auxiliary supply voltage relative to analog ground, GNDA(RocketIO pins):–0.5 to 1.32 V; (10)AVCCAUXTX, Transmit auxiliary supply voltage relative to analog ground, GNDA(RocketIO pins):–0.5 to 1.32 V; (11)AVCCAUXMGT, Management auxiliary supply voltage relative to analog ground, GNDA(RocketIO pins):–0.5 to 3.0 V; (12)VTRX, Terminal receive supply voltage relative to GND: –0.5 to 3.0 V; (13)VTTX, Terminal transmit supply voltage relative to GND: –0.5 to 1.65 V; (14)TSTG, Storage temperature (ambient): –65 to 150 ℃ ; (15)TSOL, Maximum soldering temperature(2): +220 ℃ ; (16)TJ, Maximum junction temperature:+125 ℃.

Features

XC4VFX60-10FF672I features: (1)In-System Programmable PROMs for Configuration of Xilinx FPGAs; (2)Low-Power Advanced CMOS NOR FLASH Process; (3)Endurance of 20,000 Program/Erase Cycles; (4)Operation over Full Industrial Temperature Range(–40℃ to +85℃); (5)IEEE Standard 1149.1/1532 Boundary-Scan (JTAG) Support for Programming, Prototyping, and Testing; (6)JTAG Command Initiation of Standard FPGA Configuration; (7)Cascadable for Storing Longer or Multiple Bitstreams; (8)Dedicated Boundary-Scan (JTAG) I/O Power Supply (VCCJ); (9)I/O Pins Compatible with Voltage Levels Ranging From 1.5V to 3.3V; (10)Design Support Using the Xilinx Alliance ISE and Foundation ISE Series Software Packages.

Diagrams